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CMOS Circuit Design, Layout and Simulation by Jacob Baker

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CMOS CIRCUIT DESIGN, Layout, and Simulation, 3rd Edition (IEEE Press

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Sketch A Transistor-level Schematic For A Cmos 4-input Nor G

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CMOS CIRCUIT DESIGN, Layout, and Simulation by Boyce, Li & Baker 1998

CMOS CIRCUIT DESIGN, Layout, and Simulation by Boyce, Li & Baker 1998